source and drain造句
例句與造句
- Thus it created a conductive n channel between the source and drain .
這樣在源和漏之間就產(chǎn)生了一個導(dǎo)電的n型溝道。 - In fet devices , the presence of an electrical field at the gate moderates the flow between the source and drain
在fet器件中,柵極電場的存在會調(diào)節(jié)源極和漏極之間的電流。 - It is found that the height of the metal electrode , the distance between the source and drain electrodes , the thickness of the sio
研究了場效應(yīng)納電子晶體管構(gòu)造過程中金屬電極的結(jié)構(gòu)設(shè)計,源-漏電極高度sio - In the design of the device , a kind of junction termination technology , polysilicon field plate was introduced at the edge of source and drain of the device . it reduced the electric field of pn junction and nn + at the surface to avoid breakdown at the two points
在器件設(shè)計過程中,在源端和漏端都采用了多晶場板技術(shù),減小了表面pn結(jié)和nn +處的峰值電場,避免了器件在這兩處過早擊穿。 - Usually series mode is used in low frequency circuit while bypass mode is used in high frequency circuit , series mode micro - switch with cantilever structure is similar to an fet , when voltage is applied on gate , and the fet will be turned on between source and drain
有靜電電壓作用在梁和底面電極時,梁發(fā)生偏轉(zhuǎn),在源極和漏極之間實現(xiàn)導(dǎo)通,常用于自控和通信系統(tǒng)的信號通路空氣橋旁路開關(guān)主要用于微波段信號的通路。 - It's difficult to find source and drain in a sentence. 用source and drain造句挺難的
- In order to do the research works above better , we must can precisely control the width of the quasi - 1d channel and the cut off point , and also must precisely inspire current in the 2deg , so we designed the 2 channel high precision and high stability voltage source , one channel can supply the minus voltage to the split - gate , and the other one can supply the offset voltage between the source and drain pole
為了進行上述研究,必須能夠精確的控制準(zhǔn)一維電子通道的寬度和鉗斷,以及精確的在2deg上激勵電流,由此我們設(shè)計研發(fā)了給分裂門加負偏壓和給準(zhǔn)一維電子通道加源漏偏壓的兩路高精度高穩(wěn)定性饋源。 - It is believed that p - si tft will be the main type in the future panel display . among the process of manufacture p - si tft , the source and drain will have the superposition with grid for the reason of machine ’ s alignment error . the superposition will bring superposition capacitance and it will badly cut down the electric performance
在制備多晶硅tft時,由于機器的套準(zhǔn)誤差會在柵極與源、漏極之間產(chǎn)生重疊部分,這樣就造成了柵源、柵漏之間的交疊電容,交疊電容的存在嚴重影響了多晶硅tft的性能,而利用自對準(zhǔn)工藝制備的多晶硅tft則避免了交疊電容的產(chǎn)生。